4.1 Central Processing Unit (CPU) Architecture

# Processor Fundamentals

## Central Processing Unit (CPU) Architecture

### Von Neumann model

#### Features:

- a central processing unit (CPU or processor)
- a processor able to access the memory directly
- computer memories that could store programs as well as data
- stored programs made up of instructions that could be executed in sequential order.

#### The stored program concept:

- data and instructions/programs are stored in the same memory space

### COMPONENTS OF CPU

####  System Clock

- produce timing signals/clock pulses on the control bus to ensure the synchronization take place
- to keep track of the date and time / timestamp files 
- to process operations in the correct order / sequence

#### Arithmetic & Logic Unit (ALU)

- Performs mathematical and logical operations required while running a program
- Has an “*Accumulator”* :  A temporary register used when carrying out ALU calculations

####  Control Unit (CU)

- to coordinate / synchronise the data flow and program instructions of other components in the CPU 
- to send / receive control signals along the control bus 
- to manage the execution of instructions (in sequence) 
- to control the communication between the components of the CPU

#### Immediate Access Store (IAS)

- holds all the data and programs that the CPU needs to access
- CPU takes data and programs held in backing store and puts them in IAS temporarily 
- This is done because read/write using IAS is faster compared to the backing store
- The IAS is another name for primary (RAM) memory.

#### Registers

- smallest unit of storage of microprocessor
- allows fast data transfer between other registers

##### Memory Data Register(MDR):

- holds the data/instructions which has been read from or is to be written to the address in the MAR

##### Memory Address Register(MAR):

- holds address in memory from which data will be read / to which data wil be written

##### Program Counter (PC):

- to store the address / location / memory location of the next instruction to be fetched

##### Index Register (IX):

- to store a value that is added to an address to give another address

##### Status Register (SR):

- to store flags which are set by events // from the results of arithmetic and logic operations and interrupt flags

###### Carry Flag (C)

- Set to 1 if there is CARRY in the following an addition operation

###### Negative Flag (N)

- Set to 1 if the result of a calculation has a negative value

###### Overflow Flag (V)

- Set to 1 if an arithmetic operation results in an overflow *For a* 8-bits ALU,V is set if the result is greater than 127 and less than -128

###### Zero Flag (Z)

- Set to 1 if the result of an arithmetic operation is ZERO

#### SYSTEM BUSES

![system buses.png](https://doc.tiegg.com/media/202411/5dda7b7362cc4b64a3884728271931992353.png)

##### Data bus:

bidirectional bus that carries data instructions between processor, memory, and I/O devices.

##### Address bus:

unidirectional bus that carries address of main memory location or input/output device about to be used, from processor to memory address register (MAR)

##### Control bus:

\-    8 bit wide and only carry control signals

- Bidirectional
- used to transmit control signals from control unit to ensure access/use of data & address buses by components of system does not lead to conflict

#### Performance of Computer System Factors

##### Bus Width

- Determines number of bits that can be simultaneously transferred
- Refers to number of lines in a bus
- **Increasing bus width increases number of bits transferred at one time, hence increasing processing speed and performance since there**

##### Clock speed:

- Each instruction is executed on a clock pulse // one F-E cycle is run on each clock pulse

- …. so the clock speed dictates the number of instructions that can be run per second

- **The faster the clock speed the more instructions(F-E cycles) can be run per second**

##### Number of cores:

- Each core processes one instruction per clock pulse

- **More/multiple cores mean that sequences of instructions can be split between them**

- **so more sequences of instructions can be run at the same time** 
- More cores decreases the time taken to complete task

##### Cache Memory

- Commonly used instructions are stored in the cache memory area of the CPU.
- **the higher capacity the more frequently used instructions it can store for fast access**

### Ports

- Hardware which provides a physical interface between a device with CPU and a peripheral device
- Peripheral (I/O) devices cannot be directly connected to CPU, hence connected through ports

#### Universal Serial Bus (USB)

Can connect both input and output devices to processor through a USB port

##### Benifts

devices plugged into the computer are automatically detected and device drivers are automatically loaded up

USB is a standard adopted by many manufacturers meaning all new computers will be equipped with USB ports

The connectors can only fit one way, which prevents incorrect connections being made

Devices may be powered or charged through USB so external devices may be charged while working at the computer

Several different data transmission rates are supported

newer USB standards are backward compatible with older USB standards

##### Drawbacks

the present transmission rate is limited to less than 500 megabits per second

the maximum cable length is presently about five metres

the older USB standard (such as 1.1) may not be supported in the near future

#### High Definition Multimedia Interface (HDMI)

-  Can only connect output devices (e.g. LCD display) to the processor through a HDMI port
-  HDMI cables transmit high-bandwidth and high-resolution video & audio streams through HDMI ports

##### Benifits

- the current standard for modern televisions and monitors

- allows for a very fast data transfer rate 
- improved security (helps prevent piracy) supports modern digital systems

##### Drawbacks

- not a very robust connection (easy to break connection when simply moving device)

- limited cable length to retain good signal

- there are currently five cable/ connection standards

#### Video Graphics Array (VGA)

- Can only connect output devices (e.g. second monitor/display) to the processor through a VGA port
- VGA ports allows only the transmission of video streams, but not audio components

#### Benifits

- simpler technology

- only one standard available

- it is easy to split the signal and connect a number of devices from one source
- the connection is very secure

#### Drawbacks

- old out-dated analogue technoloqy
- it is easy to bend the pins when making connections
- the cables must be of a very high grade to ensure good undistorted signal
### Fetch-execute cycle

![image.png](https://doc.tiegg.com/media/202502/ac69983148d74b359f255d56ec14abd47307.png)
![image.png](https://doc.tiegg.com/media/202502/5df116bf67914f889ce0c120e9e206199668.png)

#### Register Transfer Notation (RTN)
```
MAR ← [PC] contents of PC copied into MAR

PC ← [PC] + 1 PC is incremented by 1

MDR ← [[MAR]] data stored at address shown in MAR is copied into MDR_

CIR ← [MDR] contents of MDR copied into CIR
```
Double brackets are used in the third line because it is not MAR contents being copied into MDR but it is the data stored at the address shown in MAR that is being copied to MDR.
### Interrupt

- A signal from a device/program that it requires attention from the processor

- Interrupt Service Routine (ISR):

- Handles the interrupt by controlling the processor

- Different ISRs used for different sources of interrupt

##### Can be caused by

- a hardware fault

(an error has occurred such as a paper jam in a printer)

- a software error that cannot be ignored

(if an .exe file could not be found to initiate the execution of a program OR an attempt to divide by zero).

- user interaction

(the user pressed a key to interrupt the current process, such as <CTRL><ALT><BREAK>)

- a timing signal

- input/output processes

(a disk drive is ready to receive more data)

##### Typical sequence of actions when interrupt occurs:

- Check for interrupt at start/end of an F-E cycle
- Priority is checked
- If lower priority than current process continue with F-E cycle 
- If higher priority than all contents of registers of the running process are saved on the stack
- Location/type of interrupt identified
- Appropriate ISR is called to handle the interrupt
- When ISR finished, check for further interrupts (of higher priority)
- Otherwise load data from stack and continue with next F-E cycle (of process)

# Assembly Language

- Assembly language: low-level programming language with instructions that uses mnemonics, made up of an op code and an operand 
- Machine code: code written in binary that uses the processor’s basic machine operations

### Relationship between machine and assembly language:

- every assembly language instruction (source code) translates into exactly one machine code instruction (object code)

### Assembler

- Software that changes assembly language into machine code for the processor to understand.
- Checks the syntax of the assembly language program to ensure that only opcodes from the appropriate machine code instruction set are used.
- Errors are identified during translation before the program is executed.
- The assembler replaces all mnemonics and labels with their respective binary values (that are predefined before by the assembler software).

#### single pass assembler

- Assembler converts mnemonic source code into machine code in one sweep of program
- Cannot handle code that involves forward referencing
- Forward reference: reference to a label that is defined later in the program.

#### two pass assembler

##### On the first pass:

- Read the assembly language program one line at a time.
- Ignore anything not required, such as comments, white space.
- Allocate a memory address for the line of code.
- Check the opcode is in the instruction set.
- Add any new labels to the symbol table with the address, if known.
- Place address of labelled instruction in the symbol table.

##### On the second pass:

- Read the assembly language program one line at a time.
- Generate object code, including opcode and operand, from the symbol table generated in Pass 1.
- Save or execute the program.
- object code: a computer program after translation into machine code.

### Addressing modes

- when the instruction uses a value this defines how the operand must be used to find the value

##### Symbolic addressing

- Symbols used to represent operation codes 
- Labels can be used for addresses

##### Absolute addressing:

- The operand is a numeric address
- referring directly to a memory location

##### Direct addressing:

- The contents of the memory location in the operand *are used* 
- The operand is the address where the data is stored

Absolute and direct addressing are the same.

##### Relative addressing:

- The memory address used is the current memory address added to the operand.

##### Immediate addressing:

- the value of the operand only is used.

##### Indirect addressing:

- The contents of the contents of the memory location in *the operand are used.
- The operand is an address, that address holds another address where the data is stored

##### Indexed addressing:

- the contents of the memory location found by adding the contents of the index register (IR) to the address of the memory location in the operand are used.

### Assembly language instructions

#### Data movement instructions

- These instructions allow data stored at one location to be copied into the accumulator.
- This data can then be stored at another location, used in a calculation, used for a comparison or output.

#### Input and output of data instructions

- These instructions allow data to be read from the keyboard or output to the screen.

#### Arithmetic operation instructions

- These instructions perform simple calculations on data stored in the accumulator
- store the answer in the accumulator, overwriting the original data.

#### Unconditional and conditional instructions

- Jump means change the PC to the address specified, so the next instruction to be executed is the one stored at the specified address, not the one stored at the nextlocation in memory

#### Compare instructions

- The contents of the accumulator are always compared

# Bit manipulation

## Binary shifts

##### Logical shift

–bits shifted out of the register are replaced with zeros

##### Arithmetic shift

-the sign of the number is preserved.

##### Cyclic shift

-no bits are lost during a shift. Bits shifted out of one end of the register are introduced at the other end of the register.

##### Left shift

-bits are shifted to the left; gives the direction of shift for logical, arithmetic and cyclic shifts.

##### Right shift

-bits are shifted to the right; gives the direction of shift for logical, arithmetic and cyclic shifts.

## Bitwise operations

In monitoring and control, each bit in a memory location can be used as a **flag** and would need to be tested, set, or cleared separately.

![](/uploads/Theo/image-20231017095652135.png)